HPC | Xyalis

XYALIS High Performance Computing (HPC) for EDA

XYALIS provides tailor-made High Performance Computing (HPC) solutions for demanding Electronic Design Automation (EDA) workflows. We design and optimize software architectures that handle extremely large design databases and complex verification tasks with minimal latency.

Processing billions of polygons in seconds

Modern semiconductor layouts – whether in GDSII or OASIS® format – can contain billions of polygons spread across multiple layers and reticles. Our HPC-optimized engines are built to navigate, transform, and verify these databases at speeds that fit production schedules, without compromising accuracy or reliability.

Parallel computing for time-critical EDA tasks

Many EDA operations – geometric boolean operations, density analysis, layer manipulation, database merging or comparison – are computationally intensive by nature. XYALIS software architectures leverage high-speed parallel processing to run these tasks at chip level, reticle level, or wafer level, keeping turnaround times compatible with tapeout deadlines.

Handling the complexity of advanced process nodes

As process nodes shrink and design rules grow more complex, the volume of data to process increases exponentially. Our solutions are designed to scale accordingly, supporting curvilinear geometries required by next-generation lithography, heterogeneous multi-chip assemblies, and large-scale metrology workflows involving terabytes of layout and measurement data.

Our HPC expertise includes:

Curvilinear geometry handling for next-generation lithography
Big data processing across multi-layer, multi-reticle layout databases
High-speed parallel processing of GDSII, OASIS®, and MEBES formats